1. Field of the Invention
This invention relates generally to the fabrication of semiconductor devices. More specifically, the invention relates to a lead frame with power and/or ground buses for attachment to a semiconductor chip in a leads-over-chip (LOC) configuration.
2. State of the Art
Semiconductor devices combine an integrated circuit on a silicon or gallium arsenide substrate, a die, with a series of conductive leads which is connected to electrical circuits in an electronic apparatus. The conductive leads are part of a thin lead frame and are conventionally connected by wire bonds to electrically conductive bond pads on the die.
A reduction in the package size of the semiconductor device is enabled by a "leads-over-die" configuration as described in U.S. Pat. No. 4,862,245 of Pashby et al. A die is described in which bond pads are arrayed along a generally central axis of the die. A lead frame may then be joined to the active surface of the die on either or both sides of the row(s) of bond pads. An insulative adhesive is used, typically in conjunction with an insulative barrier such as Kapton.TM. tape, a trademarked product of duPont. Thus, the lead frame will not become shorted to the active surface of the die. The inner portions of the leads which project toward the die bond pads are joined thereto by conventional wire bonding techniques, typically using thin gold or alloy wires.
Efforts to improve the electronic characteristics of the semiconductor device and reduce the package size have led to the development of lead frames having power buses and/or ground buses, as described in U.S. Pat. Nos. 5,233,220 of Lamson et al., 5,227,661 of Heinen, 5,539,250 of Kitano et al., and 5,545,920 of Russell, for example. The buses are positioned adjacent the row(s) of bond pads on the die. As shown in these patent publications, bond wires extending from the die bond pads to the inner portions of the leads, i.e. fingers of the lead frame, must span a bus, significantly increasing the risk of shorting. In order to avoid such shorting, the bonding technique requires precise placement of the wire with a looping height high enough to avoid shorting with the bus, yet low enough (with as short a wire as possible) to avoid wire sweep during the encapsulation of the die and a portion of the lead frame. In wire sweep, the flow of viscous encapsulant over the device "sweeps" wires laterally, causing shorting between wires and/or bond breakage.
Several solutions have been proposed for avoiding the very precise techniques required when such buses are used.
It is possible to configure the lead frame so that a bus is on one side of the die bond pad row, and all other lead fingers approach the bond pad row from the opposite side. This has several distinct disadvantages:
1. If more than one bus bar is to be used, e.g. power and ground, bond wires will still have to cross one of the bus bars; and
2. The number of leads which may be accommodated by the device is limited, unless the chip size is significantly increased.
In U.S. Pat. No. 5,331,200 of Teo et al., bond wires are avoided entirely by using lead frame fingers which extend to the bond pads of the LOC die and are directly attached to them by inner lead bonding (ILB). The bus bar is positioned away from the die bond pads. The bus bar is elevated above the lead frame fingers and crosses them. The bus has its own "fingers" which are directly attached to the appropriate bond pads on the die. As disclosed, an insulating tape may be inserted between the bus fingers and the other lead frame fingers to prevent shorting therebetween.
The multilevel lead frame of Teo et al. introduces several problems. First, the multilevel lead frame must be made in several parts which are then joined with adhesive tape. This is an additional critical step in the process, requiring special equipment and precision techniques.
Second, a single tape automated bonding (TAB) step will not accommodate placement of both the main lead frame and the second level bus. A second TAB step would be required.
Third, the ILB bonding process may subject the die to greater levels of thermal shock than desired in attempting to compromise the bond formation requirements between the high temperature, pressure, and bonding time required for improved joint reliability and the need to limit exposure of the die to these conditions to avoid die degradation. In ILB bonding, a hot (300.degree. to 600.degree. C.) thermode applies pressure between the TAB leads and the bond pads of the die, which may be excessive and damage the die.
It is proposed in U.S. Pat. No. 5,252,853 of Michii that die terminals to be bused, e.g. power or ground, have bond pads in an inner row, and other bond pads be arrayed in rows outside of the bused terminals. The bus bars are positioned to overlie the inner rows and to be directly joined thereto. The signal leads are directly joined to the outer rows of bond pads. Thus, no wires or signal leads cross over (or under) a bus.
The completely successful bonding of a series of power and/or ground bond pads to an overlying bus bar is difficult.
In another proposed solution to wire-to-bus grounding, U.S. Pat. No. 5,550,401 of Maeda uses a bus bar remote from a row of die bond pads, and elevated above the lead frame fingers. A series of bus bar fingers includes a 180 degree downward bend to supportively elevate the bus bar above the signal lead fingers. The bonding wires do not cross the bus bars.
The bus of Maeda is complex and requires precision bending of the associated bus fingers. High bending stresses are introduced into each of the bus fingers, particularly in view of the very tight radii required. If bent non-uniformly, the bus bar will not be evenly supported, will have localized deformations, and will have a number of differing bending stresses introduced into the bus bar itself.
In each of the patent references cited above, an insulating layer is applied as a tape to portions of the active surface of the semiconductor die, electrically isolating it from the lead frame.
In each of U.S. Pat. Nos. 5,331,200 and 5,550,401 (both previously cited), the underside of the elevated bus bar is coated with an insulating tape to prevent short circuiting with underlying portions of the lead frame.
Of course, once the die has been encapsulated by transfer molding, it is impossible to correct a wire which is broken, shorted, or which has become unbonded. Even though the cost of manufacturing a semiconductor device through the encapsulation step is very expensive, it is rarely economical to attempt repair of a defective wire or wire bond after transfer molding. Removal of the encapsulant without destroying the interconnecting wires is extremely difficult, particularly when the encapsulant is a filled polymer.
Notwithstanding the effort by the semiconductor industry to eliminate the possibility of causing wire short circuits during device manufacturing, the problem has not been satisfactorily resolved. The invention hereinafter described is directed toward providing a simple, effective solution with numerous advantages.